Why people believe this
More layers in a neural network generally means more expressive power. The same logic seems to apply to quantum circuits — more gates should mean more capability.
The correction
On NISQ hardware, deeper circuits accumulate more noise and often produce less reliable results than shallower ones. Beyond noise, circuit depth increases execution time, which must remain shorter than the qubit coherence time. There is also the barren plateau problem — deeper parametrized circuits tend to have flatter optimization landscapes. The right circuit depth is the minimum needed for the task, not the maximum possible.
Try it in the simulator
What to do
Load the Interference preset (H-Z-H). This achieves X in depth 3. Now try adding more H and Z gates after — the result does not change because H-Z-H already implements X exactly. Extra depth adds nothing here except noise on real hardware.
Research notes
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